I/O Pads and Bond pads in ASIC

First advantages of using pads in designs are:
1) Pads enable designs to operate at different voltages (internally and externally)
2) THey have higher drive strengths to drive bigger external loads operating at higher voltages.


I/O pads have pre-driver and post-driver.
Pre-driver operating at core voltage and post-driver operating at IO voltage.
These driver internally have Level shifter to convert from IO to core voltage and vice versa, guard rings to prevent latch ups and ESD protection ckt.

Power pads for design are divided as
IO VDD power pad, IO GND pwr pad
Core VDD pwr pad, Core GND pwr pad

Pwr pads as Identified in code as having instantiations like
PVDD1DG i_lpa001( VDD); Pwr pad
PVSS1DG i_lpa002( VSS);
PDIDGZ i_lpa003( pad_a[3], a[3]); Input signal pad
PDIDGZ i_lpa004( pad_a[2], a[2]);
PDIDGZ i_lpa005( pad_a[1], a[1]);
PDIDGZ i_lpa006( pad_a[0], a[0]);
PDIDGZ i_lpa007( pad_b[3], b[3]);
PDIDGZ i_lpa008( pad_b[2], b[2]);
PDIDGZ i_lpa009( pad_b[1], b[1]);
PDIDGZ i_lpa010( pad_b[0], b[0]);
PDIDGZ i_lpa011( pad_cin, c_in);
PDO02CDG i_lpa012( c_out, pad_cout); Output signal pad
PDO02CDG i_lpa013( sum[3], pad_sum[3]);
PDO02CDG i_lpa014( sum[2], pad_sum[2]);
PDO02CDG i_lpa015( sum[1], pad_sum[1]);
PDO02CDG i_lpa016( sum[0], pad_sum[0]);

Bond pads are used to provide the connectivity from IO pads to packaging.
These are placed in between the IO pads.
Different bonding pad styles are
1) NON-CUP wire bonding (Linear or in-line and staggered types)
2) CUP wire bonding
3) Flip Chip Bonding

Linear type is used for Core limited designs and Staggered type(here more pads accomodated) for IO Limited designs.